Intel Earnings: Can Foundry Losses Stop the Turnaround?

Intel’s next checkpoint is right around the corner, and the question hanging over the call is simple enough: are Foundry losses about to cap the upside, or can the turnaround story finally show through the noise?

We’ll get a read soon. Intel said it will report Q2 2026 results on Thursday, July 23, 2026, with the call at 2:00 p.m. PDT Intel press release (Investor Relations). Expectations have tightened around margins, capex, and how quickly Foundry can move from heavy investment to a steadier operating base.

There are green shoots. The company just hit a technology milestone that matters for its roadmap, and leadership has been retooled to push packaging harder. But none of that erases near-term unit costs or depreciation. So, let’s walk through what actually needs to line up for this to work.

Point Details Earnings timing Q2 2026 results land on July 23; the call starts 2:00 p.m. PDT. Watch for segment-level disclosures on Foundry losses and capex plans. Intel press release (Investor Relations) Foundry loss trajectory The swing factor for the whole turnaround. Utilization, yields, and external customer mix determine how fast losses can narrow from here. High-NA EUV milestone ASML says Intel Foundry is in high-volume manufacturing on parts of Core Ultra Series 3 (Panther Lake) using High-NA EUV, an industry first for logic. ASML press release (GlobeNewswire) Leadership shift Seok‑Hee Lee appointed EVP of Intel Foundry to accelerate advanced packaging and back-end manufacturing execution. Intel press release (Investor Relations) Industry backdrop ASML lifted its 2026 sales outlook to €43–45B on strong demand, which keeps tool supply tight and ramps capital intensive. ASML Q2 2026 press release (GlobeNewswire) What could move the stock Clearer glidepath on Foundry losses, proof of external orders or prepayments, and evidence that packaging can monetize ahead of leading-edge nodes.

What Intel needs to show on July 23

Look, excitement around new nodes can mask the messy math. Investors will care less about labels and more about line items. On the call, the traffic lights are pretty obvious.

• Foundry operating losses: Are they narrowing sequentially and how? Management has to separate one-time items from core utilization and yield trends.
• Gross margin guardrails: Is consolidated GM stepping higher without relying on mix quirks? If Foundry absorbs more fixed costs, does CCG or DCAI offset it?
• External Foundry revenue: Even a modest step-up from pilot to recurring shipments matters. Any talk of take-or-pay, NRE, or prepayments would help model cash flow.
• Capex and depreciation: Are 2026–2027 outlays front-loaded? Clarity on depreciation timing for High-NA tools and packaging lines will drive EPS sensitivity.
• Packaging monetization: With Seok‑Hee Lee now leading Foundry’s packaging push, how quickly can Foveros and other advanced packaging convert into revenue? Intel press release (Investor Relations)
• Working capital and FCF: Ramps eat cash. Watch inventory builds for Panther Lake and any commentary on customer-funded tools or substrate commitments.

Pro tip: If management frames progress with “milestones” but dodges absolute dollar losses or capex cadence, assume the P&L drag persists longer than bulls want.

The Foundry math: yields, utilization, and cost absorption

This whole debate lives inside a factory spreadsheet. Leading-edge fabs bleed until they’re full enough, clean enough, and steady enough. Three levers decide whether Foundry losses block the turnaround or just delay it.

1) Yields

Early lots at a new node usually look ugly. Defect density has to fall, rework has to shrink, and you need enough runs to stabilize recipes. High-NA EUV should enable tighter patterning, but it also brings a different learning curve and resist sensitivity. More good die per wafer fixes a lot of sins. It also shortens cycle times when you rework less.

2) Utilization

Even with great yields, low tool utilization is a margin killer. Fixed costs don’t care if you’re at 30 percent or 80 percent. This is where external customers matter. Internal loads can fill the line, but you still need billable wafers to normalize price and mix over time.

3) Cost absorption and depreciation

New EUV tools, especially High-NA, are not cheap. Depreciation will surge as assets go into service. If the ramp is staggered, you get the expense before you get the revenue. That’s the window where foundry losses feel worst to the consolidated P&L.

• Checklist: ask about scrap rates, tool uptime, rework percentage, and cycle-time reductions quarter on quarter.
• Listen for: external wafer starts, any minimum volume commitments, and whether pricing reflects High-NA layers or is partially subsidized via NRE.

Pro tip: When management talks “learning rate,” translate it to unit-cost slope. A flat slope means losses linger even if the tech headlines sound great.

High-NA EUV enters the chat: signal vs. noise

There’s real progress to acknowledge. ASML announced that Intel Foundry entered high-volume manufacturing for a subset of Core Ultra Series 3 (Panther Lake) with High-NA EUV, calling it the first high-volume logic product patterned with High-NA ASML press release (GlobeNewswire). That’s a technical proof point investors have been waiting on.

Here’s the nuance. High-NA helps patterning and could reduce multi-patterning steps at tight pitches, but it doesn’t magically erase expenses. Tool costs are higher, resists are finicky, and throughput differs from mature EUV. Financially, it matters only when those wafers flow at volume and mix improves toward higher ASP products.

It also plugs into a tight equipment cycle. On July 15, ASML reported Q2 net sales of €9.3 billion and net income of €2.9 billion, while raising its 2026 sales outlook to €43–45 billion ASML Q2 2026 press release (GlobeNewswire). Translation: tools are spoken for, lead times stay real, and capex discipline matters more than ever.

Leadership moves and the packaging edge

Packaging is where Intel can surprise on the upside. The company named Seok‑Hee Lee as EVP of Intel Foundry to push advanced packaging and back-end manufacturing harder Intel press release (Investor Relations). That’s not just a HR headline. It signals focus on a piece of the stack where demand is tight and time-to-revenue can be shorter than a fresh node ramp.

Why it matters:

• AI systems are substrate and packaging limited as much as wafer limited. If Intel can offer credible Foveros-based capacity with competitive yield and cycle time, customers will line up.
• Packaging revenue can land earlier in the product cycle, which helps smooth the P&L during a bleeding-edge node ramp. It’s not a panacea, but it buys time.
• Back-end wins build customer trust. That trust transfers when you pitch a full-stack foundry deal later.

Customer pipeline and pricing: what we can infer

Intel doesn’t need to announce a blockbuster foundry contract this quarter to keep the turnaround intact. It does need to show that the pipeline is real and that pricing won’t trap margins in the red. A few things matter more than the headline logos.

• Contract structure: Take-or-pay and prepayments help utilization and cash flow. NRE can subsidize design enablement and offset early unit costs.
• Wafer pricing: If High-NA layers reduce total mask steps, there’s room to price for value. But customers will push back until yields prove out.
• Packaging attach: Bundling advanced packaging with wafer starts can lift overall margin even if front-end margins are thin at first.
• Mix discipline: Prioritize high-ASP dies and steady customers over chasing every logo. Early-stage ramps can’t carry a chaotic mix.

Here’s a simple way to think about it without getting hung up on undisclosed numbers. Suppose an early-ramp product has shaky yields but a strong packaging attach. If the bundled ASP offsets scrap and tool downtime, cash burn narrows sooner. If not, you’re stuck waiting for yield curves to bend while depreciation runs hot. Pricing power is the fulcrum here.

Scenarios for the next 12 months

Base case: slow and steady narrowing

Foundry losses remain hefty but trend better quarter over quarter as Panther Lake volumes inch up and packaging revenue fills gaps. Consolidated gross margin grinds higher, but free cash flow is choppy due to equipment and substrate investments. Guidance leans conservative on capex, with an eye to 2027 for cleaner operating leverage.

Upside case: external orders plus packaging pull-forward

Intel secures visible external wafer starts and locks in prepayments or minimums. Packaging ramps ahead of schedule under the new leadership, letting the company book healthier blended margins. High-NA EUV throughput improves faster than modeled. Foundry losses narrow meaningfully, easing the drag on consolidated EPS sooner than anticipated.

Downside case: tool cadence and yield drag

ASML’s busy delivery slate keeps certain tools on a longer leash, stretching Intel’s learning curve. Yields improve but not fast enough to offset depreciation, and external demand stays more exploratory than committed. Foundry losses weigh on guidance, and investors question the timing of a true inflection.

What would change the narrative quickly? Clear disclosure of run-rate losses, a credible bridge to breakeven metrics (utilization and yield targets, not just dates), and at least one externally validated production engagement with volume milestones.

Why this matters beyond Intel: AI supply, miners, and risk appetite

Even if you don’t trade Intel, this intersects with AI infrastructure, cloud capex, and yes, parts of the digital asset ecosystem. Chip supply dictates accelerator pricing, which trickles through to AI compute markets and the economics of GPU-focused clouds that many crypto miners flirted with post-halving. If High-NA ramps smoothly and packaging capacity loosens, accelerator pricing pressure could finally ease. If it doesn’t, the squeeze persists and capital keeps crowding into the most profitable architecture vendors.

On a broader market read, ASML’s higher 2026 sales outlook tells you demand for leading-edge capacity remains intense ASML Q2 2026 press release (GlobeNewswire). For risk assets, that’s a two-sided coin: growth visibility is good, but capital intensity stays elevated, and any delay in yield learning rates can ripple into earnings misses across the stack.

Mistakes to avoid when parsing the call

• Confusing a technology milestone with margin progress. High-NA EUV in HVM is great, but margin work shows up in scrap, rework, and utilization data points ASML press release (GlobeNewswire).
• Ignoring packaging as a bridge. With new leadership, packaging can be a real monetization vector before leading-edge nodes hit scale Intel press release (Investor Relations).
• Taking consolidated margin at face value. Mix shifts can flatter a quarter. Ask what happens if Foundry absorbs more depreciation next quarter.
• Underestimating the tool cycle. ASML’s raised outlook implies stretched deliveries and continued capex pressure across the industry ASML Q2 2026 press release (GlobeNewswire).

What would actually qualify as a turnaround?

Not a headline. Not a logo. A turnaround looks like this:

• Foundry losses narrowing in absolute dollars for at least two straight quarters, with management tying the improvement to utilization and yield, not one-offs.
• Packaging revenue and margin stepping higher with clear capacity adds and cycle-time improvements.
• At least one external customer in recurring production, not just shuttle runs or engineering lots.
• Capex mapped to tool deliveries and depreciation schedules that the company can actually cash flow against, including any incentives or customer funding where applicable.
• Stable consolidated gross margin that doesn’t crack when Foundry pushes more assets into service.

Get three of those five this year, and the narrative shifts from “if” to “when.” Miss them, and the market will keep discounting the promise of a manufacturing comeback.

If you want a quick pulse-check list for earnings day:

• Did Foundry losses narrow sequentially, and by how much?
• What’s the updated 2026 capex and depreciation timing, especially for High-NA?
• Any external wafer starts or prepayments disclosed?
• Packaging backlog, cycle time, and yield commentary?
• Consolidated gross margin direction vs. guidance last quarter?

One last thought: Intel has put real points on the board with High-NA and leadership moves. Those matter. But cash is king, and the P&L will call the shots until external demand shows up in recurring revenue. That’s the lens for July 23.

For more grounded takes like this across chips, AI infrastructure, and market structure, we cover the cross-currents regularly at Crypto Daily. No fluff. Just what moves the tape.

Frequently Asked Questions

When is Intel’s next earnings report?

Intel said it will report Q2 2026 results on Thursday, July 23, 2026. The earnings call is scheduled for 2:00 p.m. Pacific time. You can find the notice on the company’s investor site here.

What’s the biggest variable for Intel’s turnaround?

The trajectory of Foundry losses. If utilization rises and yields improve while packaging monetizes, losses can narrow and stop masking progress elsewhere. If those levers stall, the drag on margins and cash flow continues.

Does the High-NA EUV milestone change the near-term P&L?

Not immediately. ASML said Intel Foundry reached high-volume manufacturing with High-NA for parts of Panther Lake, which validates the tech path. But the near-term P&L depends on yields, throughput, and paid volume, not just the milestone itself.

Why does ASML’s outlook matter to Intel?

ASML raised its 2026 sales outlook to €43–45B on strong demand, signaling tight tool availability and sustained capital intensity across the industry. That affects Intel’s ramp cadence, depreciation timing, and how quickly foundry economics can normalize.

What should investors listen for in Intel’s guidance?

Clarity on Foundry operating losses, any external wafer starts or prepayments, packaging revenue momentum, and specific capex plus depreciation timing for 2026–2027. Those details frame the path to margin improvement.

Can packaging offset weak front-end margins?

It can help. Strong packaging demand and better cycle times can drive earlier revenue and healthier blended margins while new nodes ramp. It won’t fix everything, but it can narrow the gap during the toughest quarters.

Is this investment advice?

No. Semiconductor stocks are volatile, and manufacturing ramps add execution risk. Treat the above as a framework for your own research, not a recommendation.

Disclaimer: This article is provided for informational purposes only. It is not offered or intended to be used as legal, tax, investment, financial, or other advice.