TSMC researchers achieve 0.42-nanometer breakthrough in transistor tech

Silicon has been the backbone of the semiconductor industry for decades, but it’s running into a wall. Atoms are only so small, and silicon transistors are approaching the point where physics starts saying “no.” A new breakthrough from TSMC and National Yang Ming Chiao Tung University (NYCU) suggests there might be a detour around that wall.

The research team fabricated a monolayer MoS₂ top-gate transistor featuring an epitaxial interface layer just 0.42 nanometers thick. To put that in perspective, a single strand of human DNA is about 2.5 nanometers wide. This layer is roughly one-sixth of that.

How a layer thinner than an atom chain changes the game

Problems like electron scattering, where charge carriers bounce off imperfections at the interface, and leakage current, where electricity sneaks through paths it shouldn’t, have plagued efforts to build practical 2D transistors. The TSMC-NYCU team’s solution was elegant: deposit an ultrathin epitaxial aluminum layer onto a monolayer of MoS₂ grown via chemical vapor deposition, then oxidize it to create a buffer of aluminum oxide (Al₂O₃).

On top of that buffer, the team applied a high-κ hafnium oxide gate dielectric. The combined stack achieved an equivalent oxide thickness of approximately 1 nm, which is a critical benchmark for next-generation semiconductor devices.

The resulting transistors demonstrated low leakage current and minimal hysteresis, which is the tendency for a device’s output to lag behind its input. For channels measuring around 100 nm, the devices hit a maximum transconductance of 0.45 mS/μm. Transconductance measures how effectively a transistor converts voltage changes into current changes, so higher numbers mean better performance.

The research was published in Nature Electronics and was led by Dr. Iuliana Radu from TSMC Corporate Research, alongside NYCU professors Wen-Hao Chang and Tsung-En Lee.

Why silicon is running out of road

Two-dimensional materials like MoS₂ offer a potential escape route. A monolayer of MoS₂ is naturally about 0.7 nm thick, which gives it inherently tighter electrostatic control at extremely small dimensions compared to silicon.

From lab bench to fab floor

The MoS₂ was grown using chemical vapor deposition, a technique already used at industrial scale. The epitaxial aluminum deposition and oxidation steps don’t require fundamentally new equipment categories.

This research aligns with broader industry efforts to make 2D transistors production-ready. TSMC, imec, and ASML announced 300 mm 2D transistor integration work in June 2026, signaling that the major players in chipmaking infrastructure are taking this material class seriously.

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