Nvidia just dropped storage performance benchmarks for its Vera CPU that read like a flex. The chip, embedded inside the BlueField-4 STX storage processor, clocked up to 3.67 times higher throughput on CRC32C integrity checks compared to a typical x86 CPU.
The benchmarks, published on August 3, cover the exact workloads that define modern AI-native storage: encryption, compression, integrity verification, and data recovery.
The numbers behind the claim
CRC32C integrity checking grabbed the headline number at 3.67x, but the rest of the benchmark suite tells a broader story.
Data compression speeds came in at 3.29 times faster than the x86 baseline. Reed-Solomon recovery, the math that reconstructs lost data across storage arrays, hit 3.26x. Multi-stage pipeline performance landed at 3.21x.
AES-128 encryption showed a 1.43x improvement, while decompression clocked 1.72x faster throughput.
In English: the tasks where raw parallel throughput matters most saw the biggest gains. The tasks that lean on specialized instruction sets, like AES encryption where x86 chips have dedicated hardware accelerators baked in, showed smaller but still meaningful advantages.
What’s under the hood
Vera runs 88 custom Nvidia Olympus cores built on the Armv9.2 architecture, delivering 176 threads total.
The chip uses SOCAMM2 LPDDR5X memory capable of aggregate bandwidth up to 1.2 TB/s. It also features what Nvidia calls a Scalable Coherency Fabric providing 3.4 TB/s of core-to-core bisection bandwidth.
The dual-role aspect is worth noting too. Vera isn’t just a storage accelerator chip. It’s designed to serve as the host CPU for Nvidia’s Rubin GPU platforms, sitting at the center of what Nvidia calls its “unified AI factory stack.”
The commercial launch is scheduled for fall 2026.
Why this matters for the market
The risk, as always with vendor benchmarks, is that real-world performance rarely matches the controlled conditions of a product launch. The 3.67x headline number is measured against “a typical x86 CPU,” and Nvidia hasn’t specified exactly which x86 chip served as the comparison point.
Disclosure: This article was edited by Editorial Team. For more information on how we create and review content, see our Editorial Policy.

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